Journal Articles (All Issues)

EXPLORING THE RESIDUE NUMBER SYSTEM VIA CONJUGATE MODULI SETS

Authors

Bentipalli Sekhar1, G Appala Naidu2, K. Babulu3,

Keyword Residue number system, conjugate moduli sets, data conversion, and RNS arithmetic.

Abstract

In recent years, electronics & communication and computer applications like, Data Communication and Networking, Digital Signal Processing, FIR filters, Artificial Intelligence, Bioinformatics, and Cryptography…etc. be in need of fast computation with error free operations required. To furnish these, different parameters matter, in the midst of the number system used will also play a major role. Residue Number System (RNS) [1], which has carry free in nature and fault tolerant discharges the above-mentioned operations with go over. The significant issues, in effective plan of RNS based system are the moduli set selection, forward conversion i.e. Analog/Digital number to RNS representation, residue arithmetic unit and reverse conversion i.e. RNS representation to Analog/Digital number In this paper, conjugate moduli sets are selected for analyzing how selection of moduli sets affects the performance of RNS. Considered moduli sets are [2], special moduli set {2n-1, 2n, 2n+1}, {2n-1, 2n, 2n+1, 2n+1-1} and [3], conjugate moduli set {2 n1-1, 2 n1+1, 2 n2-1, 2 n2+1}. .For the above mentioned, date conversion examples and also one of the applications [4], of RNS i.e. FIR fiters with RNS also investigated. From [5, 3], performances of selected moduli sets are reviewed, compared and summarized. It is concluded that, conjugate moduli set {2 n1-1, 2 n1+1, 2 n2-1, 2 n2+1} has better performance among the selected conjugate moduli sets and its utility in the above-mentioned applications yields greater impact on performance of the RNS based system.

References

    o Taylor, "Residue Arithmetic A Tutorial with Examples," in Computer, vol. 17, no. 5, pp. 50-62, May 1984, doi: 10.1109/MC.1984.1659138.S. C. Yang, “Toward a wireless world,” IEEE Technol. Soc. Mag., vol. 26, no. 2, pp. 32–42, Jun. 2007. o K. Navi, A. S. Molahosseini and M. Esmaeildoust, "How to Teach Residue Number System to Computer Scientists and Engineers," in IEEE Transactions on Education, vol. 54, no. 1, pp. 156-163, Feb. 2011, doi: 10.1109/TE.2010.2048329. • Skavantzos and M. Abdallah, "Implementation issues of the two-level residue number system with pairs of conjugate moduli," in IEEE Transactions on Signal Processing, vol. 47, no. 3, pp. 826-838, March 1999, doi: 10.1109/78.747787. o Mohan, P.V.A. (2002). Applications of Residue Number Systems. In: Residue Number Systems. The Springer International Series in Engineering and Computer Science, vol 677. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-0997-4_8 o Ananda Mohan, P.V. (2016). RNS to Binary Conversion. In: Residue Number Systems. Birkhäuser, Cham. https://doi.org/10.1007/978-3-319-41385-3_5 o S. C. Yang, “Toward a wireless world,” IEEE Technol. Soc. Mag., vol. 26, no. 2, pp. 32–42, Jun. 2007. o R. Schneiderman, “DSPs evolving in consumer electronics applications,” IEEE Signal Process. Mag., vol. 27, no. 3, pp. 6–10, May 2010. o T. Stouraitis and V. Paliouras, “Considering the alternatives in lowpower design,” IEEE Circuits Devices Mag., vol. 17, no. 4, pp. 23–29,Jul. 2001. o H. L. Garner, “The residue number system,” IRE Trans. Electron. Comput., vol. 8, no. 2, pp. 140–147, 1959. o C.-H. Chang, A. S. Molahosseini, A. A. E. Zarandi, and T. F. Tay, “Residue number systems: A new paradigm to datapath optimization for low-power and high-performance digital signal processing applications,” IEEE Circuits Syst. Mag., vol. 15, no. 4, pp. 26–44, 4th Quart. 2015. o R. Conway and J. Nelson, “Improved RNS FIR Filter Architectures,” IEEE Transactions On Circuits and Systems II, Vol. 51, No. 1, pp. 26-28, 2004 o W. Wei et al., “RNS application for digital image processing,” Proceedings of the 4th IEEE international workshop on system-on-chip for real time applications, Canada, pp. 77-80, 2004. o S. Yen, S. Kim, S. Lim and S. Moon, “RSA Speedup with Chinese Remainder Theorem Immune against Hardware Fault Cryptanalysis,” IEEE Transactions on Computers, vol. 52, no. 4, pp. 461-472, 2003. o J. Ramirez, et al., “Fast RNS FPL-Based Communications Receiver Design and Implementation," Proceedings of the 12th Int’l Conf. Field Programmable Logic, pp. 472-481, 2002. • Omondi and B. Premkumar, “Residue Number System: Theory and Implementation,” Imperial College Press 2007, ISBN 978-1-86094-866-4. o G. C. Cardarilli, A. Nanareelli, and M. Re, “Reducing power dissipation in FIR filters using the residue number system,” Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems, Vol. 2, pp. 320-323, 2000. • Nanareelli, M. Re, and G. C. Cardarilli, “Tradeoffs between residue number system and traditional FIR filters,” The 2001 IEEE International Symposium on Circuits and Systems, Vol. 2, pp. 305-308, 2001. o W. K. Jenkins, “Finite Arithmetic Concepts in Handbook for DSP,” S. K. Mitra and J. F. Kaiser, eds., Wiley, 1993, pp. 611-675. o Ghassem Jaberipur and Seyed Hamed Fatemi Langroudi,” (4 + 2 logn)ΔG Parallel Prefix Modulo Adder 2n-3 via Double Representation of Residues in [0,2], IEEE Transactions on Circuits and Systems II: Express Briefs,2015. o Azadeh Alsadat Emrani Zarandi, Amir Sabbagh Molahosseini, Leonel Sousa, and Mehdi Hosseinzadeh,” An Efficient Component for Designing Signed Reverse Converters for a Class of RNS Moduli Sets of Composite Form {2k, 2P − 1}”,IEEE Transactions On Very Large Scale Integration (VLSI) Systems, PP. 1063-8210 , 2016. o Zeinab Torabi and Ghassem Jaberipur,” Low-Power/Cost RNS Comparison via Partitioning the Dynamic Range”, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016. o Piotr Patronik and Stanisław J. Piestrak,” Hardware/Software Approach to Designing Low-Power RNS-Enhanced Arithmetic Units”,IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS–I: REGULAR PAPERS, 2017. • Omondi and B. Premkumar, “Residue Number System: Theory and Implementation,” Imperial College Press 2007, ISBN 978-1-86094-866-4. • Cao, C. Chang, and T. Sirkanthan, “A residue-to-binary converter for a new five-moduli set,” IEEE Transactions on Circuits and Systems, 35 (11), 1998. o G. C. Cardarilli, A. Nanareelli, and M. Re, “Reducing power dissipation in FIR filters using the residue number system,” Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems, Vol. 2, pp. 320-323, 2000. • Nanareelli, M. Re, and G. C. Cardarilli, “Tradeoffs between residue number system and traditional FIR filters,” The 2001 IEEE International Symposium on Circuits and Systems, Vol. 2, pp. 305-308, 2001. • Parhami and C. Y. Hung, “Optimal Table Lookup Schemes for VLSI Implementation of Input/Output Conversions and other Residue Number Operations,” In: VLSI Signal Processing VII, IEEE Press, New York, 1997. o M. A. Soderstrand, W. K. Jenkins, G. A. Jullien and F. J. Taylor, “Residue Number System Arithmetic: Modern Applications in Digital Signal Processing,” IEEE Press, New York, 1986. o Yuke Wang, "Residue-to-binary converters based on new Chinese remainder theorems," in IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 47, no. 3, pp. 197-205, March 2000, doi: 10.1109/82.826745. o Samavi, Shadrokh. (2014). Residue Number System (RNS). o Afeez Adeshina Oke 1 , Babatunde Akinbowale Nathaniel 1 , Balogun Fatimah Bukola 1 , Oloyede Abdulkarim Ayopo,” RESIDUE NUMBER SYSTEM BASED APPLICATIONS: A LITERATURE REVIEW” Anale. Seria Informatică. Vol. XIX fasc. 1 – 2021 Annals. Computer Science Series. 19 th Tome 1st Fasc. – 2021 o (Martinelli et al., 1990) (Abdelhamid & Koppula, 2017) (Salamat, Imani, Gupta, & Rosing, 2019) (Babenko, E, Tchernykh, & Golimblevskaia, 2020) (N I Chervyakov et al., 2020) (Samimi, Kamal, Afzallikusha, & Pedram, 2019) (Zhi-Gang & Mattina, 2020 o Vassalos & Bakalis, 2013) (Kenneth & J., 1977) (Soudris, DSgouropoulos, Tatas, & Padidis, 2003) (Pontarelli, Cardarilli, Re, & Salsano, 2008) (Luan, Chen, Ge, & Wang, 2014 o Yatskiv, Sachenko, Nataliya, Bykovvy, & Segin, 2019) (Yatskiv & Tsavolyk, 2017) (T. Singh, 2014) (Campobello, Leonardi, Palazzo, & Member, 2012) (Liberato, Martinello, Gomes, Beldachi, Salas, Villaca, Ribeiro, Kondepu, et al., 2018) (Raji, Gbolagade, & Taofeek-ibrahim, 2018 o Mei, Gao, Guo, Zhao, & Yang, 2019) (Pandey, Mitharwal, & Karmakar, 2019 o Atta-Ur-Rahman, Naseem, Qureshi, & Muzaffar, 2011; M. Naseem, Qureshi, Muzaffar, & ur Rahman, 2016; M. T. Naseem & Muzaffar, 2012) (Priyanka, Nireesha, Kumar, Ram, & Chakravarthy, 2012) (Qureshi & Muzaffar, 2016) (Rahman et al., 2018 o Wei Wang, Swamy, & Ahmad, 2004) (Toivonen, 2006) (Taleshmekaeil & Mousavi, 2010) (S. Alhassan, Gbolagade, 2013) (Nikolai I Chervyakov, Lyakhov, Nikolai, & Bogayevskiy, 2019 o Gomathisankaran, Tyagi, & Namuduri, 2011) (Kar, Sur, Basak, Sukla, & Das, 2016) (Tchernykh, Babenko, Chervyakov, & Mirandalópez, 2018 o Yatskiv, Sachenko, Nataliya, Bykovvy, & Segin, 2019) (Yatskiv & Tsavolyk, 2017) (T. Singh, 2014) (Campobello, Leonardi, Palazzo, & Member, 2012) (Liberato, Martinello, Gomes, Beldachi, Salas, Villaca, Ribeiro, Kondepu, et al., 2018) (Raji, Gbolagade, & Taofeek-ibrahim, 2018 o Rajalakshmi & Nivedita, 2018) (Kehinde & Alagbe, 2018) (Mensah, Bankas, & Iddrisu, 2018 • M. Schinianakis, Kakarountas, & Stouraitis, 2006) (Lim & Phillips, 2007) (Akinbowale N Babatunde, Jimoh, & Gbolagade, 2016) (Fournaris & Sklavos, 2016) (Kayode & Gbolagade, 2017) (Oyinloye & Gbolagade, 2018) (Akinbowale Nathaniel Babatunde, Jimoh, Oshodi, & Alabi, 2019 (I. Z. Alhassan & Ansong, 2020) o AyyavaruReddy, Y. and Sekhar, B. (2016) An Efficient Reverse Converter Design for Five Moduli Set RNS. International Journal of Advanced Research in Computer and Communication Engineering, 5, 208-212.

Downloads

View/Download PDF

PDF



Published

2024-01-30

Issue

Vol. 43 No. 01 (2024)